Presently, in the electronic industry, products that are made thin and small and that have high speed, multiple functions, high performance, and high reliability are required. One important technology that enables the products to be designed in this manner is semiconductor package technology called chip scale package (CSP).
In a bump chip carrier (BCC) semiconductor package that is one type of the CSP, only the part exposed to the outside to be attached to the pad metal and the board of a semiconductor die is bonded by electrically conductive wire. There are limitations on the length of the electrically conductive wire used during wire bonding in order to reduce a noise signal. Since only standoff stitch bonding (SSB) can be performed in a bump area in a wire bonding method, it takes a long time to perform the wire bonding process.
A thin substrate chip scale package (TSCSP) is another type of CSP. In a TSCSP certain wirebond routing cannot be performed due to limitations in board mounting. Thus, TSCSPs will have limitations on reducing the length of the electrically conductive wire.
Therefore, a need existed to provide a device and method to overcome the above problems.